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| MAX97003 high-efficiency, low-noise audio subsystem ????????????????????????????????????????????????????????????????? maxim integrated products 1 general description the MAX97003 audio subsystem combines a mono speaker amplifier with a stereo headphone amplifier. the headphone and speaker amplifiers have independent volume and on/off controls. the four inputs are configu - rable as two differential or four single-ended inputs. to minimize output noise, both the headphone and speaker outputs utilize a downward expander/noise gate to attenuate noise when no desired input signal is present. the speaker output incorporates an adjustable dynamic range compressor (drc) and distortion limiter to protect the speaker and maximize loudness. this allows high gain for low-level signals without compromising the qual - ity of large signals. all controls are performed using the two-wire i 2 c inter - face. the ic operates in the extended -40 n c to +85 n c temperature range, and is available in the 2.0mm x 2.4mm, 20-bump wlp package (0.4mm pitch). applications cell phones portable media players features s 2.7v to 5.5v speaker supply voltage s 1.8v headphone supply voltage s 1.0w speaker output (v pvdd = 4.2v, z spk = 8 i + 68h, 1% thd+n) s 32mw/channel headphone output (r hp = 32 i ) s active emissions limiting for enhanced emi reduction s efficient class h headphone amplifier s ground-referenced headphone outputs s headphone ground sense s 2 stereo single-ended/mono differential inputs s integrated expander/noise gate for low output noise s integrated drc (speaker outputs) s integrated distortion limiter (speaker outputs) s extensive click-and-pop reduction circuitry s tdma noise free s 2.0mm x 2.4mm, 20-bump wlp package (0.4mm pitch) simplified block diagram 19-6044; rev 0; 9/11 ordering information appears at end of data sheet. for related parts and recommended products to use with this part, refer to: www.maxim-ic.com/MAX97003.related. stereo/ mono input stereo/ mono input class d amplifier charge pump power supply 1.8v battery control i 2 c headphone ground sense limiter drc and expander expander volume volume class h amplifier MAX97003 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxims website at www.maxim-ic.com.
????????????????????????????????????????????????????????????????? maxim integrated products 2 MAX97003 high-efficiency, low-noise audio subsystem table of contents general description ............................................................................ 1 applications .................................................................................. 1 features ..................................................................................... 1 simplified block diagram ........................................................................ 1 functional diagram/typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 absolute maximum ratings ...................................................................... 7 electrical characteristics ........................................................................ 7 digital i/o characteristics ....................................................................... 12 i 2 c timing characteristics ...................................................................... 13 typical operating characteristics ................................................................ 14 bump configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 bump description ............................................................................. 21 detailed description ........................................................................... 22 signal path ................................................................................ 22 class d speaker amplifier .................................................................... 22 ultra-low emi filterless output stage ......................................................... 23 dynamic range compressor (drc) .......................................................... 24 expander ............................................................................... 25 speaker low-power mode .................................................................. 26 distortion limiter ......................................................................... 26 headphone amplifier ........................................................................ 26 directdrive .............................................................................. 26 charge pump ............................................................................ 27 class h operation ........................................................................ 28 ground sense ........................................................................... 28 volume-change features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 zero-crossing detection ................................................................... 28 volume slewing .......................................................................... 28 enhanced volume smoothing ............................................................... 28 volume readback ........................................................................ 28 i 2 c slave address ........................................................................... 28 registers map ........................................................................... 28 volume readback ........................................................................... 30 input configuration .......................................................................... 31 mixers .................................................................................... 32 volume control ............................................................................. 33 ????????????????????????????????????????????????????????????????? maxim integrated products 3 MAX97003 high-efficiency, low-noise audio subsystem table of contents ( continued ) dynamic range control ...................................................................... 34 expander (noise gate) ....................................................................... 35 distortion limiter ............................................................................ 36 speaker low-power mode .................................................................... 37 output gain ................................................................................ 38 advanced configuration ...................................................................... 39 power management ......................................................................... 40 i 2 c serial interface .......................................................................... 40 bit transfer .............................................................................. 41 start and stop conditions ................................................................ 41 early stop conditions ..................................................................... 41 slave address ........................................................................... 41 acknowledge ............................................................................ 41 write data format ........................................................................ 42 read data format ........................................................................ 43 applications information ........................................................................ 44 filterless class d operation ................................................................... 44 rf susceptibility ............................................................................ 44 startup/shutdown sequencing ................................................................. 44 component selection ........................................................................ 45 optional ferrite bead filter ................................................................. 45 input capacitor ........................................................................... 45 charge-pump capacitor selection ........................................................... 45 charge-pump flying capacitor .............................................................. 45 charge-pump holding capacitor ............................................................ 45 supply bypassing, layout, and grounding ..................................................... 45 wlp applications information .................................................................. 46 ordering information .......................................................................... 46 package information ........................................................................... 47 revision history .............................................................................. 48 ????????????????????????????????????????????????????????????????? maxim integrated products 4 MAX97003 high-efficiency, low-noise audio subsystem list of figures figure 1. signal path .......................................................................... 22 figure 2. stereo single-ended and differential input configurations ..................................... 23 figure 3. emi with 12in of speaker cable .......................................................... 23 figure 4. low-signal to high-signal transition, no clipping, drc disabled ............................... 24 figure 5. low-signal to high-signal transition, increased gain, drc disabled ............................. 24 figure 6. low-signal to high-signal transition, increased gain, drc enabled ............................. 24 figure 7. drc gain curve ...................................................................... 24 figure 8. expander gain curve .................................................................. 25 figure 9. high-signal to low-signal transition, expander disabled ...................................... 25 figure 10. high-signal to low-signal transition, expander enabled ...................................... 25 figure 11. high-signal to low-signal transition, speaker expander with speaker low-power mode ............ 26 figure 12. limiter gain curve .................................................................... 26 figure 13. traditional amplifier output vs. MAX97003 directdrive output ................................. 27 figure 14. class h operation .................................................................... 28 figure 15. i 2 c serial interface timing diagram ...................................................... 40 figure 16. start, stop, and repeated start conditions ........................................... 41 figure 17. acknowledge ........................................................................ 41 figure 18. writing 1 byte of data to the ic ......................................................... 42 figure 19. writing n-bytes of data to the ic ........................................................ 42 figure 20. reading one byte of data from the ic .................................................... 43 figure 21. reading n-bytes of data from the ic ..................................................... 43 figure 22. optional class d ferrite bead filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 figure 23. wlp ball dimensions ................................................................. 46 ????????????????????????????????????????????????????????????????? maxim integrated products 5 MAX97003 high-efficiency, low-noise audio subsystem list of tables table 1. register map ......................................................................... 29 table 2. volume readback registers ............................................................. 30 table 3. input configuration registers ............................................................. 31 table 4. mixer registers ........................................................................ 32 table 5. headphone volume control registers ...................................................... 33 table 6. dynamic range control registers ......................................................... 34 table 7. expander registers .................................................................... 35 table 8. distortion limiter register ............................................................... 36 table 9. speaker low-power mode register ........................................................ 37 table 10. output gain register .................................................................. 38 table 11. advanced configuration control register .................................................. 39 table 12. power management register ............................................................ 40 table 13. startup sequence ..................................................................... 44 ????????????????????????????????????????????????????????????????? maxim integrated products 6 MAX97003 high-efficiency, low-noise audio subsystem functional diagram/typical application circuit hplmix hprmix mix mix mix spkmix + + 10f pg aina -3db to +12db pg aina -3db to +12db pg ainb -3db to +12db pg ainb -3db to +12db hplvol: -63db to 0db hprvol: -63db to 0db spkvol: -63db to 0db inadiff inbdiff 1f ina1 1f ina2 1f inb1 c4 d5 d4 1f inb2 c5 sda c2 b1 gnd d3 v dd charge pump a2 1f 1f1 f c1p a1 c1n b3 cpvdd cpvss a3 pgnd v dd thd limiter thdclp scl b2 control 0.1f 1f 10f pvdd c1 bias bias hpvdd hpvss hpvdd hpvss pvdd hpren hplen 1 f b5 hpl a5 hpr a4 hpsns b4 spkp d1 spkn spken pgnd d2 c3 expander drc and expander v dd 1.6v to 2.0v 2.7v to 5.5v 0db to 6db 0db to 6db +12db to 24db MAX97003 ????????????????????????????????????????????????????????????????? maxim integrated products 7 MAX97003 high-efficiency, low-noise audio subsystem (voltages with respect to gnd.) v dd , cpvdd ........................................................ -0.3v to +2.2v bias .......................................................... -0.3v to (v dd + 0.3v) pvdd .................................................................... -0.3v to +6.0v pgnd ................................................................... -0.1v to +0.1v cpvss ................................................................. -2.2v to +0.3v c1n ................................... (v cpvss - 0.3v) to (v cpvdd + 0.3v) c1p ..................................................... -0.3v to (v cpvdd + 0.3v) hpl, hpr .......................... (v cpvss - 0.3v) to (v cpvdd + 0.3v) ina1, ina2, inb1, inb2 ....................................... -0.3v to +6.0v sda, scl ............................................................. -0.3v to +6.0v spkp, spkn .......................................... -0.3v to (v pvdd + 0.3v) hpsns .................................................................. -0.3v to +0.3v continuous current in/out of pvdd, pgnd, spk_ ....... q 800ma continuous current in/out of hpr, hpl, v dd .............. q 140ma continuous input current (all other pins) ........................ q 20ma duration of spk_ short circuit to gnd or pvdd ...... continuous duration of short circuit between spkp and spkn ... continuous duration of hp_ short circuit to gnd or v dd ........... continuous continuous power dissipation (t a = +70 n c) wlp multilayer board (derate 21.7mw/ n c above +70 n c) ................................ 1.74w junction temperature ..................................................... +150 n c operating temperature range .......................... -40 n c to +85 n c storage temperature range ............................ -65 n c to +150 n c soldering temperature (reflow) ...................................... +260 n c absolute maximum ratings stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress ratings only, and functional opera - tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. electrical characteristics (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured single-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) parameter symbol conditions min typ max units speaker amplifier supply voltage range pvdd guaranteed by psrr test 2.7 5.5 v headphone amplifier supply voltage range v dd guaranteed by psrr test 1.6 2 v quiescent current i dd hp mode, t a = +25 n c, stereo se input on ina routed to hp output, hp expander disabled i vdd 1.21 1.6 ma i pvdd 1.07 1.3 hp mode, t a = +25 n c, stereo se input on ina routed to hp output, hp expander enabled i vdd 2.46 2.95 i pvdd 1.34 1.6 spk mode, t a = +25 n c mono differential input on ina routed to spk output; spk expander, drc, and limiter all disabled i vdd 0.1 0.15 i pvdd 2.25 2.6 spk mode, t a = +25 n c mono differential input on ina routed to spk output; spk expander, drc, and limiter all enabled i vdd 1.35 1.65 i pvdd 2.6 2.95 spk + hp mode, t a = +25 n c stereo se input on ina routed to hp and spk output; spk and hp expanders, drc, and limiter all disabled i vdd 1.21 1.6 i pvdd 2.74 3.2 ????????????????????????????????????????????????????????????????? maxim integrated products 8 MAX97003 high-efficiency, low-noise audio subsystem electrical characteristics ( continued ) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured single-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) parameter symbol conditions min typ max units shutdown current i shdn i vdd , t a = +25 n c 0.08 2.5 f a i pvdd , t a = +25 n c 0.05 1 turn on-time t on time from power-on to full operation slew = 0 17 ms slew = 1 10 preamplifiers input resistance r in t a = +25 n c -3db to +9db 15 20.4 28.5 k i +10.5db to +12db 5.2 6.96 9.5 gain pgain_ = 0x0 -3.2 -2.98 -2.79 db pgain_ = 0x1 -1.49 pgain_ = 0x2 -0.22 -0.02 +0.21 pgain_ = 0x3 1.57 pgain_ = 0x4 3.04 pgain_ = 0x5 4.52 pgain_ = 0x6 6.06 pgain_ = 0x7 7.51 pgain_ = 0x8 9.01 pgain_ = 0x9 10.59 pgain_ = 0xa 11.82 12 12.36 maximum input signal swing preamp = 0db 2.4 v p-p common-mode rejection ratio cmrr f = 1khz (differential input mode), 0db 63 db input dc voltage in__ inputs 1.2 1.23 1.275 v bias voltage v bias 1.2 1.23 1.275 v speaker amplifier output offset voltage vos t a = +25 n c (volume at mute, spkgain = 00) q 0.5 q 2.5 mv t a = +25 n c (volume at 0db, spkgain = 00) q 1.0 click-and-pop level k cp peak voltage, t a = +25 n c, a-weighted, 32 samples per second, volume at 0db, spkgain = 00 (note 2) into shutdown -72 dbv out of shutdown -65 ????????????????????????????????????????????????????????????????? maxim integrated products 9 MAX97003 high-efficiency, low-noise audio subsystem electrical characteristics ( continued ) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured single-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) parameter symbol conditions min typ max units power-supply rejection ratio (note 2) psrr t a = +25 n c v pvdd = 2.7v to 5.5v 65 90.4 db f = 217hz, v ripple = 200mv p-p 80 f = 1khz, v ripple = 200mv p-p 78 f = 10khz, v ripple = 200mv p-p 72 output power (note 3) p out thd+n = 1% z spk = 8 i + 68 f h, v pvdd = 4.2v 1007 mw z spk = 8 i + 68 f h, v pvdd = 3.6v 735 z spk = 4 i + 33 f h, v pvdd = 5.0v 2585 total harmonic distortion plus noise thd+n f = 1khz, p out = 700mw, t a = +25 n c, z spk = 8 i + 68 f h 0.06 % f = 1khz, p out = 350mw, t a = +25 n c, z spk = 8 i + 68 f h 0.029 0.048 output noise a-weighted noise gate disabled 40 f v rms noise gate enabled 25 signal-to-noise ratio snr a-weighted, p out = 700mw noise gate disabled 93 db noise gate enabled 98 output frequency f osc spread spectrum 298.9 khz spread-spectrum bandwidth q 10 khz gain spkgain = 00 11.69 db spkgain = 01 15.4 15.65 15.92 spkgain = 10 19.64 spkgain = 11 23.7 current limit 2 a efficiency h p out = 1w, f = 1khz, z spk = 8 i + 68 f h 92 % volume control spkvol = 0x00 -63.35 -62.87 -62.36 db spkvol = 0x3f -0.044 0 0.13 volume control step size 1 db mute attenuation f = 1khz 118 db ???????????????????????????????????????????????????????????????? maxim integrated products 10 MAX97003 high-efficiency, low-noise audio subsystem electrical characteristics ( continued ) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured single-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) parameter symbol conditions min typ max units charge pump charge-pump frequency v hpl = v hpr = 0v 80 83.3 86 khz v hpl = v hpr = 0.2v 665 v hpl = v hpr = 0.5v 500 positive output voltage v cpvdd v out > v th v dd v v out < v th v dd /2 negative output voltage v cpvss v out > v th -v dd v v out < v th -v dd /2 output voltage threshold v th output voltage at which the charge pump switches modes, v out rising or falling q v dd x 0.216 q v dd x 0.25 q v dd x 0.278 v mode transition timeouts time it takes for the charge pump to transition from invert to split mode 30 ms time it takes for the charge pump to transition from split to invert mode 20 f s headphone amplifiers output offset voltage vos t a = +25 n c q 0.15 q 0.5 mv click-and-pop level k cp peak voltage, t a = +25 n c, a-weighted, 32 samples per second, volume at 0db (note 2) into shutdown -73 dbv out of shutdown -73 power-supply rejection ratio (note 2) psrr t a = +25 n c v dd = 1.6v to 2.0v 65 99.9 db f = 217hz, v ripple = 200mv p-p 93 f = 1khz, v ripple = 200mv p-p 88 f = 20khz, v ripple = 200mv p-p 65 ???????????????????????????????????????????????????????????????? maxim integrated products 11 MAX97003 high-efficiency, low-noise audio subsystem electrical characteristics ( continued ) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured single-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) parameter symbol conditions min typ max units output power p out thd+n = 1%, pgaina = -1.5db, hpgain = +2db r hp = 16 i 42 mw r hp = 32 i 32 thd+n = 0.1%, pgaina = -1.5db, hpgain = +2db r hp = 32 i 27 channel-to-channel gain tracking hpl to hpr, volume at 0db, hplmix = 0x1, hprmix = 0x2, in_diff = 0 0.25 1.5 % total harmonic distortion plus noise thd+n r hp = 32 i , p out = 10mw, f = 1khz 0.005 % r hp = 16 i , p out = 10mw, f = 1khz 0.006 output noise a-weighted noise gate disabled 10 f v rms noise gate enabled 5.9 signal-to-noise ratio snr a-weighted, p out = 10mw noise gate disabled 94.2 db noise gate enabled 96.4 capacitive drive c l 1000 pf crosstalk hpl to hpr, hpr to hpl, r hp = 32 i , p out = 10mw f = 20hz to 10khz -78 db f = 1khz -83 gain hpgain = 00 -0.53 -0.25 +0.09 db hpgain = 01 1.72 hpgain = 10 3.72 hpgain = 11 5.85 volume control hp_vol = 0x00 -63.74 -63.3 -62.9 db hp_vol = 0x3f -0.50 -0.27 +0.09 volume control step size 1 db mute attenuation f = 1khz 100 db speaker drc release time drcrls = 000 800 ms/ step drcrls = 101 25 attack time drcatk = 000 0.5 ms drcatk = 111 50 compression ratio drcen = 001 1.34:1 ratio drcen = 101 j :1 ???????????????????????????????????????????????????????????????? maxim integrated products 12 MAX97003 high-efficiency, low-noise audio subsystem electrical characteristics ( continued ) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured single-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) digital i/o characteristics (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) parameter symbol conditions min typ max units compression threshold drcth = 0x01 0.839 v rms drcth = 0x1f 0.199 speaker and headphone expander attack time high signal to low signal transition exp_atk = 000 500 ms/ step exp_atk = 101 25 exp_atk = 110 15 release time low-signal to high-signal transition 0.2 ms/ step expander threshold exp_th = 0x1 32 mv p exp_th = 0xf 1 speaker distortion limiter distortion threshold thdclp = 0x1 < 1 % thdclp = 0xf 24 attack time 0.5 ms release time thdrls = 000 0.076 s thdrls = 111 6.2 parameter symbol conditions min typ max units digital inputs (sda and scl) input voltage high v ih 0.7 x v dd v input voltage low v il 0.4 x v dd v input hysteresis v hys 200 mv input capacitance c in 10 pf input leakage current i in t a = +25 n c q 1.0 f a input leakage current i in v dd = 0v, t a = +25 n c q 1.0 f a digital outputs (sda open drain) output low voltage sda v ol i sink = 3ma 0.4 v ???????????????????????????????????????????????????????????????? maxim integrated products 13 MAX97003 high-efficiency, low-noise audio subsystem i 2 c timing characteristics (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. t a = t min to t max , unless otherwise noted. typical values are at t a = +25 n c.) (note 1) note 1: 100% production tested at t a = +25 n c. specifications over temperature limits are guaranteed by design. note 2: amplifier inputs are ac-coupled to gnd. note 3: class d amplifier testing performed with a resistive load in series with an inductor to simulate an actual speaker load. note 4: c b is in pf. parameter symbol conditions min typ max units serial-clock frequency f scl 0 400 khz bus free time between stop and start conditions t buf 1.3 f s hold time (repeated) start condition t hd,sta 0.6 f s scl pulse-width low t low 1.3 f s scl pulse-width high t high 0.6 f s setup time for a repeated start condition t su,sta 0.6 f s data hold time t hd,dat 0 900 ns data setup time t su,dat 100 ns sda and scl receiving rise time t r (note 4) 20 + 0.1c b ns sda and scl receiving fall time t f (note 4) 20 + 0.1c b 300 ns sda transmitting fall time t f (note 4) 20 + 0.1c b 250 ns setup time for stop condition t su,sto 0.6 f s bus capacitance c b 400 pf pulse width of suppressed spike t sp 0 50 ns ???????????????????????????????????????????????????????????????? maxim integrated products 14 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) total harmonic distortion plus noise vs. frequency MAX97003 toc03 frequency (hz) thd+n ratio (%) 10k 1k 100 0.01 0.1 1 10 100 0.001 10 100k v pvdd = 4.2v z spk = 8i + 68h p out = 800mw p out = 200mw total harmonic distortion plus noise vs. frequency MAX97003 toc04 frequency (hz) thd+n ratio (%) 10k 1k 100 0.01 0.1 1 10 100 0.001 10 100k v pvdd = 4.2v z spk = 4i + 33h p out = 1.5w p out = 500mw total harmonic distortion plus noise vs. frequency MAX97003 toc05 frequency (hz) thd+n ratio (%) 10k 1k 100 0.01 0.1 1 10 100 0.001 10 100k v pvdd = 4.2v z spk = 8i + 68h p out = 600mw ssm ffm supply current vs. supply voltage MAX97003 toc01 supply voltage (v) supply current (ma) 5.0 4.5 4.0 3.5 3.0 0.5 1.0 1.5 2.0 2.5 3.0 0 2.5 5.5 i pvdd spk mode expander, drc, and limiter disabled shutdown current vs. supply voltage MAX97003 toc02 supply voltage (v) shutdown current (a) 5.0 4.5 4.0 3.5 3.0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0 2.5 5.5 i pvdd general speaker amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 15 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (continued) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) total harmonic distortion plus noise vs. output power MAX97003 toc06 output power (w) thd+n ratio (%) 2.0 1.5 1.0 0.5 0.01 0.1 1 10 100 0.001 0 2.5 v pvdd = 5v z spk = 8i + 68h f = 6khz f = 1khz f = 100khz total harmonic distortion plus noise vs. output power MAX97003 toc07 output power (w) thd+n ratio (%) 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.01 0.1 1 10 100 0.001 0 4.0 v pvdd = 5v z spk = 4i + 33h f = 6khz f = 1khz f = 100khz total harmonic distortion plus noise vs. output power MAX97003 toc08 output power (w) thd+n ratio (%) 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.01 0.1 1 10 100 0.001 0 1.6 v pvdd = 4.2v z spk = 8i + 68h f = 6khz f = 1khz f = 100khz total harmonic distortion plus noise vs. output power MAX97003 toc09 output power (w) thd+n ratio (%) 2.5 2.0 1.5 1.0 0.5 0.01 0.1 1 10 100 0.001 0 3.0 v pvdd = 4.2v z spk = 4i + 33h f = 6khz f = 1khz f = 100khz total harmonic distortion plus noise vs. output power MAX97003 toc10 output power (w) thd+n ratio (%) 1.0 0.8 0.6 0.4 0.2 0.01 0.1 1 10 100 0.001 0 1.2 v pvdd = 3.6v z spk = 8i + 68h f = 6khz f = 1khz f = 100khz total harmonic distortion plus noise vs. output power MAX97003 toc11 output power (w) thd+n ratio (%) 1.5 1.0 0.5 0.01 0.1 1 10 100 0.001 0 2.0 v pvdd = 3.6v z spk = 4i + 33h f = 6khz f = 1khz f = 100khz speaker amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 16 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (continued) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) efficiency vs. output power MAX97003 toc12 output power (mw) efficiency (%) 2.0 1.5 1.0 0.5 10 20 30 40 50 60 70 80 90 100 0 0 2.5 z spk = 8i + 68h z spk = 4i + 33h v pvdd = 4.2v f in = 1khz efficiency vs. output power MAX97003 toc13 output power (mw) efficiency (%) 1.5 1.0 0.5 10 20 30 40 50 60 70 80 90 100 0 0 2.5 z spk = 8i + 68h z spk = 4i + 33h v pvdd = 3.6v f in = 1khz output power vs. supply voltage MAX97003 toc14 supply voltage (v) output power (w) 5.0 4.5 4.0 3.5 3.0 0.5 1.0 1.5 2.0 2.5 0 2.5 5.5 z spk = 8i + 68h f in = 1khz 1% thd+n 10% thd+n output power vs. supply voltage MAX97003 toc15 supply voltage (v) output power (w) 5.0 4.5 4.0 3.5 3.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0 2.5 5.5 z spk = 4i + 33h f in = 1khz 1% thd+n 10% thd+n output power vs. load resistance MAX97003 toc16 load resistance (i) output power (w) 100 10 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0 11 k thd+n = 1% v pvdd = 4.2v z spk = load + 68h f in = 1khz thd+n = 10% frequency (hz) 1k 100k psrr (db) 10k 100 10 power-supply rejection ratio vs. frequency MAX97003 toc17 20 40 60 80 100 120 0 v pvdd = 4.2v v ripple = 200mv p-p z spk = 8i + 68h inputs ac-coupled to gnd speaker amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 17 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (continued) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) power-supply rejection ratio vs. supply voltage MAX97003 toc18 supply voltage (v) psrr (db) 5.0 4.5 4.0 3.5 3.0 20 40 60 80 100 120 0 2.5 5.5 v ripple = 200mv p-p f in = 1khz inputs ac-coupled to gnd inband output spectrum MAX97003 toc19 frequency (hz) amplitude (dbv) 15k 10k 5k -120 -100 -80 -60 -40 -20 0 -140 0 20k ssm f in = 1khz inband output spectrum MAX97003 toc20 frequency (hz) amplitude (dbv) 15k 10k 5k -120 -100 -80 -60 -40 -20 0 -140 0 20k ffm f in = 1khz wideband output spectrum MAX97003 toc21 frequency (mhz) output amplitude (dbv) -100 -80 -60 -40 -20 0 -120 rbw = 100hz ffm 10 1 0.1 100 wideband output spectrum MAX97003 toc22 frequency (mhz) output amplitude (dbv) -100 -80 -60 -40 -20 0 -120 rbw = 100hz ssm 10 1 0.1 100 speaker volume gain vs. spkvol code MAX97003 toc23 spkvol code (numeric) speaker volume gain (db) 60 50 40 30 20 10 -60 -50 -40 -30 -20 -10 0 -70 07 0 speaker amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 18 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (continued) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) total harmonic distortion plus noise vs. frequency MAX97003 toc26 frequency (hz) thd+n ratio (%) 0.01 0.1 1 10 100 0.001 10 10k 1k 100 100k p out = 5mw p out = 20mw v pvdd = 4.2v v dd = 1.8v r hp = 32i total harmonic distortion plus noise vs. frequency MAX97003 toc27 frequency (hz) thd+n ratio (%) 0.01 0.1 1 10 100 0.001 10 10k 1k 100 100k p out = 10mw p out = 25mw v pvdd = 4.2v v dd = 1.8v r hp = 16i total harmonic distortion plus noise vs. output power MAX97003 toc28 output power (w) 0.045 0.040 0.035 0.030 0.025 0.020 0.015 0.010 0.005 0 0.050 thd+n ratio (%) 0.01 0.1 10 100 0.001 1 f = 6khz f = 1khz f = 100hz r hp = 32i shutdown response MAX97003 toc24 speaker output 200ma / div vs2en = 0 slew = 0 zcd = 0 2ms / div scl 2v/div turn-on response MAX97003 toc25 speaker output 200ma / div 4ms / div scl 2v/div vs2en = 0 slew = 0 zcd = 0 speaker amplifier headphone amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 19 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (continued) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) inband output spectrum MAX97003 toc34 frequency (hz) amplitude (dbv) 16k 18k 14k 4k 2k 6k 8k 10k 12k -160 -140 -120 -100 -80 -60 -40 -20 0 0 20k f in = 1khz r load = 32i 20 40 60 80 100 120 0 MAX97003 toc33 psrr (db) 10k 1k 100 10 100k power-supply rejection ratio vs. frequency frequency (hz) v pvdd = 4.2v v dd = 1.8v v ripple = 200mv p-p on v dd inputs ac-coupled to gnd r load = 32 i MAX97003 toc32 output power (mw) 1k 100 10 10 20 30 40 50 60 70 0 1 10k output power vs. load resistance and charge-pump capacitance load resistance ( i ) f in = 1khz thd+n = 1% c charge_pump = c c1n-c1p c cpvdd = c cpvss c charge_pump = 2.2f c charge_pump = 0.47f c charge_pump = 1f MAX97003 toc31 output power (mw) 1k 100 10 10 20 30 40 50 60 70 80 0 1 10k output power vs. load resistance load resistance ( i ) f in = 1khz thd+n = 10% thd+n = 1% power dissipation vs. output power MAX97003 toc30 output power (mw) power dissipation (mw) 10 20 30 40 50 60 70 80 90 100 0 160 120 100 80 40 60 20 0 140 f in = 1khz p out = p hpl + p hpr r load = 16i r load = 32i MAX97003 toc29 output power (w) 0.06 0.05 0.04 0.03 0.02 0.01 0 0.07 total harmonic distortion plus noise vs. output power thd+n ratio (%) 0.01 100 0.001 f = 6khz f = 1khz f = 100hz r hp = 16i 0.1 10 1 headphone amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 20 MAX97003 high-efficiency, low-noise audio subsystem typical operating characteristics (continued) (v dd = 1.8v, v pvdd = 4.2v, v gnd = v pgnd = 0v. headphone path: pgain_ = -1.5db, hp_vol = 0db, hpgain = +2db, input signal configured singled-ended. speaker path: pgain_ = 0db, spkvol = 0db, spkgain = +12db, input signal configured differential. speaker loads (z spk ) connected between spkp and spkn. headphone loads (r hp ) connected from hpl or hpr to gnd. sda and scl pullup voltage = 1.8v. z spk = j , r hp = j . c c1p-c1n = c cpvdd = c cpvss = c bias = 1 f f.) headphone volume gain vs. hp_vol code MAX97003 toc38 hp_vol code (numeric) headphone volume gain (db) 60 50 40 30 20 10 -60 -50 -40 -30 -20 -10 0 -70 07 0 shutdown response MAX97003 toc39 hp_ 500mv/ div 4ms / div scl 2v/div vs2en = 0 slew = 0 zcd = 0 turn-on response MAX97003 toc40 4ms / div scl 2v/div hp_ 500mv/ div vs2en = 0 slew = 0 zcd = 0 -140 -120 -100 -80 -60 -40 -20 inband output spectrum MAX97003 toc35 amplitude (dbv) 0 f in = 1khz r load = 16 i frequency (hz) 16k 18k 14k 4k 2k 6k 8k 10k 12k 0 20k -160 -100 -80 -60 -40 -20 0 -120 MAX97003 toc36 crosstalk (db) 10k 1k 100 10 100k crosstalk vs. frequency frequency (hz) r load = 32 i hpr to hpl hpl to hpr 10k 1k 100 10 100k common-mode rejection ratio vs. frequency MAX97003 toc37 frequency (hz) cmrr (db) 10 20 30 40 50 60 70 80 90 100 0 r load = 32i pgain = 0db pgain = -3db pgain = 6db pgain = 12db headphone amplifier ???????????????????????????????????????????????????????????????? maxim integrated products 21 MAX97003 high-efficiency, low-noise audio subsystem bump configuration bump description bump name function a1 c1n charge-pump flying capacitor negative terminal. connect a 1 f f capacitor between c1p and c1n. a2 c1p charge-pump flying capacitor positive terminal. connect a 1 f f capacitor between c1p and c1n. a3 cpvss headphone amplifier negative power supply. bypass with a 1 f f capacitor to pgnd. a4 hpr headphone amplifier right output a5 hpl headphone amplifier left output b1 gnd analog ground b2 scl serial clock input. connect a pullup resistor from scl to the i 2 c bus supply. b3 cpvdd headphone amplifier positive power supply. bypass with a 1 f f capacitor to pgnd. b4 hpsns headphone ground sense. connect to the headset jacks ground terminal. b5 bias common-mode bias. bypass to gnd with a 1 f f capacitor. c1 pvdd speaker amplifier power supply. bypass with a 0.1 f f and a 10 f f capacitor to pgnd. c2 sda serial-data input/output. connect a pullup resistor from sda to the i 2 c bus supply. c3 v dd headphone amplifier supply. bypass with a 0.1 f f and a 10 f f capacitor to gnd. c4 inb1 input b1. left or negative input. c5 inb2 input b2. right or positive input. d1 spkp positive speaker output d2 spkn negative speaker output d3 pgnd speaker amplifier ground and charge-pump ground d4 ina1 input a1. left or negative input. d5 ina2 input a2. right or positive input. c1p cpvss hpr c1n 23 4 1 a scl cpvdd hpsns gnd b sda v dd top view (bump side down) wlp hpl 5 bias inb2 pvdd c spkn pgnd ina1 ina2 spkp d + inb1 MAX97003 ???????????????????????????????????????????????????????????????? maxim integrated products 22 MAX97003 high-efficiency, low-noise audio subsystem detailed description the MAX97003 audio subsystem combines a mono speaker amplifier with a stereo headphone amplifier. the high-efficiency 1w class d speaker amplifier operates directly from a lithium-ion battery and consumes no more than 0.05 f a when in shutdown mode. the headphone amplifier utilizes a dual-mode charge pump and a class h output stage to maximize efficiency while outputting a ground-referenced signal that does not require output coupling capacitors. the headphone and speaker ampli - fiers have independent volume and on/off control. the four inputs are configurable as two differential inputs or four single-ended inputs. all control is performed using the two-wire i 2 c interface. the speaker amplifier incorporates a distortion limiter to automatically reduce the volume level when excessive clipping occurs. this allows high gain for low-level sig - nals without compromising the quality of large signals. the speaker amplifier also features an adjustable drc that provides programmable compression or limiting of the audio signal. both the headphone and speaker amplifiers feature a downward expander/noise gate to attenuate noise when no input signal is present. the headphone amplifier features a ground-sense pin to eliminate ground loop noise when the headphone jack is in use. signal path the signal path consists of flexible inputs, signal mixing, volume control, and output amplifiers ( figure 1 ). the inputs can be configured for single-ended or differen - tial signals ( figure 2 ). the internal preamplifiers feature programmable gain settings using internal resistors. following preamplification, the input signals are mixed, volume adjusted, and routed to the headphone and speaker amplifiers based on the desired configuration. class d speaker amplifier the class d speaker amplifier utilizes active emissions- limiting and spread-spectrum modulation to minimize the emi radiated by the amplifier. figure 1. signal path -63db to 0db mixer and mux ina2 ina1 inb2 inb1 0db to +6db hpl hpr spkp spkn -63db to 0db0 db to +6db -63db to 0db+ 12db to +24db input a -3db to +12db input b -3db to +12db ???????????????????????????????????????????????????????????????? maxim integrated products 23 MAX97003 high-efficiency, low-noise audio subsystem figure 2. stereo single-ended and differential input configurations figure 3. emi with 12in of speaker cable ultra-low emi filterless output stage traditional class d amplifiers require the use of external lc filters or shielding to meet en55022b electromag - netic-interference (emi) regulation standards. maxims patented active emissions limiting edge-rate control circuitry and spread-spectrum modulation reduces emi emissions, while maintaining up to 93% efficiency. maxims spread-spectrum modulation mode flattens wideband spectral components, while proprietary tech - niques ensure that the cycle-to-cycle variation of the switching period does not degrade audio reproduction or efficiency. the ics spread-spectrum modulator random - ly varies the switching frequency by q 10khz around the center frequency (300khz). above 10mhz, the wideband spectrum looks like noise for emi purposes. see figure 3 . r in_2 (r) stereo single-ended l in_1 (l) in_2 (+) differential in_1 (-) to mixer to mixer frequency (mhz) emission level (dbv/m) 900 800 600 700 200 300 400 500 100 10 30 50 70 90 -10 0 1000 ???????????????????????????????????????????????????????????????? maxim integrated products 24 MAX97003 high-efficiency, low-noise audio subsystem dynamic range compressor (drc) the speaker amplifier features a dynamic range compres - sor (drc) that attenuates high-amplitude signals and allows for a higher gain setting to be selected without clipping the output signal. this increases the perceived loudness of the audio signal and maintains a stable output amplitude despite changes in input amplitude. figure 4 , figure 5 , and figure 6 demonstrate the benefits of using the drc. each of these figures uses the same input signal. to operate the drc, select a threshold level, compres - sion ratio, attack time constant, and release time through registers 0x0a and 0x0b. when enabled, rms signal levels that cross above the selected drc threshold level are attenuated based on the selected compression ratio ( figure 7 ). attenuation is achieved by automatically mod - ifying the speaker volume to a lower gain setting. the user-selected gain setting is automatically restored when the rms signal level falls below the drc threshold. the attack time constant determines the time constant used when the drc engages. the release time determines the time-per-step used when the drc disengages. figure 4. low-signal to high-signal transition, no clipping, drc disabled figure 5. low-signal to high-signal transition, increased gain, drc disabled figure 6. low-signal to high-signal transition, increased gain, drc enabled figure 7. drc gain curve threshold 0.199 to 0.839 0.85 0.85 :1 4:1 2:1 1.5:1 1:1 input (v rms ) output (v rms ) ???????????????????????????????????????????????????????????????? maxim integrated products 25 MAX97003 high-efficiency, low-noise audio subsystem expander the ics speaker and headphone amplifier signal paths include and expander. the expander reduces the noise floor when there is no desired input signal by attenuat - ing peak signals that are below the selected expander threshold ( figure 8 ). attenuation is achieved by automati - cally modifying the speaker or headphone volume to a lower gain setting. expansion ratio and attack time set - tings are configured by registers 0x0c for the headphone path and 0x0d for the speaker path. the expansion ratio determines the input:output relationship used when the input signal is below the selected threshold. the expan - sion attack time determines the time-per-step used when the expander engages. figure 9 and figure 10 show the benefits of the expander by comparing the output with the expander disabled against the output with the expander enabled. the expander acts as a noise gate when the expansion ratio is set to an input:output relationship of infinity:1. in this case, all signals below the selected threshold are muted. figure 8. expander gain curve figure 9. high-signal to low-signal transition, expander disabled figure 10. high-signal to low-signal transition, expander enabled threshold 1 to 32 1200 1200 :1 4:1 2:1 1:1 input (mv p ) output (mv p ) ???????????????????????????????????????????????????????????????? maxim integrated products 26 MAX97003 high-efficiency, low-noise audio subsystem speaker low-power mode the ics speaker path expander includes a low-power mode that increases power efficiency when there is no desired input signal. set the programmable threshold in register 0x0f to determine when low-power mode is activated. when low-power mode is enabled, the class d switching output is active only if the speaker volume setting selected by the expander is above the selected low-power mode threshold. for example, if the speaker low-power mode threshold is set to -30db and the input signal is such that the speaker expander attenuates the output volume setting to at least -30db, the class d amplifier is turned off ( figure 11 ). low-power mode is only available when the speaker expander is enabled. distortion limiter the speaker amplifier integrates a limiter to provide speaker protection and ensures high-quality audio. when enabled, the limiter monitors the audio signal at the out - put of the class d speaker amplifier and decreases the gain if the distortion exceeds the predefined threshold. attenuation is achieved by automatically modifying the speaker volume as appropriate. the limiter automatically tracks the battery voltage to reduce the gain as the bat - tery voltage drops. figure 12 shows the typical output vs. input curves with and without the distortion limiter. the dotted line shows the maximum gain for a given distortion limit without the distortion limiter. the solid line shows how, with the distortion limiter enabled, the gain can be increased without exceeding the set distortion limit. when the limiter is enabled, selecting a high gain level results in peak signals being attenuated while low signals are left unchanged. this increases the perceived loudness with - out the harshness of a clipped waveform. to operate the distortion limiter, select a distortion thresh - old and release time constant through the 0x0e register. zcd must be set to 0 in register 0x11 for the distortion limiter to operate properly. headphone amplifier directdrive traditional single-supply headphone amplifiers have outputs biased at a nominal dc voltage (typically half the supply). large coupling capacitors are needed to block this dc bias from the headphone. without these capacitors, a significant amount of dc current flows to the headphone, resulting in unnecessary power dis - sipation and possible damage to both headphone and headphone amplifier. maxims patented directdrive m architecture uses a charge pump to create an internal negative supply volt - age. this allows the headphone outputs of the ic to be biased at gnd while operating from a single supply ( figure 13 ). without a dc component, there is no need for the large dc-blocking capacitors. instead of two large (220 f f, typ) capacitors, the ic's charge pump requires figure 11. high-signal to low-signal transition, speaker expander with speaker low-power mode figure 12. limiter gain curve directdrive is a registered trademark of maxim integrated products, inc. spkp spkn input distortion (% thd+n) distortion threshold level < 1 to 24 limiter enabled an d gain increase d limiter disabled ???????????????????????????????????????????????????????????????? maxim integrated products 27 MAX97003 high-efficiency, low-noise audio subsystem two small ceramic capacitors, conserving board space, reducing cost, and improving the frequency response of the headphone amplifier. see the output power vs. charge-pump capacitance and load resistance graph in the typical operating characteristics section for details of the possible capacitor sizes. there is a low dc voltage on the amplifier outputs due to amplifier offset. however, the offset of the ic is typically q 0.15mv, which, when combined with a 32 i load, results in less than 5 f a of dc current flow to the headphones. in addition to the cost and size disadvantages of the dc-blocking capacitors required by conventional headphone amplifiers, these capacitors limit the ampli - fiers low-frequency response and can distort the audio signal. previous attempts at eliminating the output-coupling capacitors involved biasing the head - phone return (sleeve) to the dc bias voltage of the headphone amplifiers. this method raises a few issues: ? the sleeve is typically grounded to the chassis. using the midrail biasing approach, the sleeve must be isolated from system ground, complicating product design. ? during an esd strike, the amplifiers esd structures are the only path to system ground. thus, the amplifier must be able to withstand the full energy from an esd strike. ? when using the headphone jack as a line out to other equipment, the bias voltage on the sleeve can con - flict with the ground potential from other equipment, resulting in possible damage to the amplifiers. charge pump the ics dual-mode charge pump generates both the positive and negative power supply for the headphone amplifier. to maximize efficiency, both the charge pumps switching frequency and output voltage change based on signal level. when the input signal level is less than 10% of v dd , the switching frequency is reduced to a low rate. this minimizes switching-losses in the charge pump. when the input signal exceeds 10% of v dd , the switching fre - quency increases to support the load current. for input signals below 25% of v dd , the charge pump generates q (v dd /2) to minimize the voltage drop across the amplifiers power stage and thus improves efficiency. input signals that exceed 25% of v dd cause the charge pump to output q v dd . the higher output voltage allows for full output power from the headphone amplifier. to prevent audible glitches when transitioning from the q (v dd /2) output mode to the q v dd output mode, the charge pump transitions very quickly. this quick change draws significant current from v dd for the duration of the transition. the bypass capacitor on v dd supplies the required current and prevent droop on v dd . the charge pumps dynamic switching mode can be turned off through the i 2 c interface. the charge pump can then be forced to output either q (v dd /2) or q v dd regardless of input signal level. figure 13. traditional amplifier output vs. MAX97003 directdrive output v dd v dd /2 v out gnd conventional driver-biasing scheme +v dd v dd /2 v out -v dd directdrive biasing scheme ???????????????????????????????????????????????????????????????? maxim integrated products 28 MAX97003 high-efficiency, low-noise audio subsystem class h operation a class h amplifier uses a class ab output stage with power supplies that are modulated by the output signal. in the case of the ic, two nominal power-supply differen - tials of 1.8v (+0.9v to -0.9v) and 3.6v (+1.8v to -1.8v) are available from the charge pump. figure 14 shows the operation of the output voltage dependent power supply. ground sense the headphone amplifier features output ground sensing that is used to reduce ground loop noise when the head - phone output jack is connected to a different ground than the amplifier ground. an example of this is when the head - phone jack is used as a lineout and connected to an exter - nal power amplifier. in addition, the ground sense reduces noise that can be caused by voltage drops between the amplifier ground and the headphone jack ground pin dur - ing normal headphone use. hpsns must be connected to the ground pin on the headphone jack. volume-change features the ic includes several features that enhance perfor - mance during volume changes. zero-crossing detec - tion, volume slewing, and enhanced volume smoothing are used to improve click-and-pop performance during volume changes. volume readback is used to report the actual volume setting after the drc, expander, or distor - tion limiter applies an automatic volume change. zero-crossing detection the ic features zero-crossing detection to reduce clicks and pops during volume changes. when zero-crossing detection is enabled, all volume changes are delayed until a zero-crossing has been detected. if no zero-cross - ing is detected within 100ms, then the zero-crossing detector times out and volume changes are executed. disabling zero-crossing detection allows volume chang - es to occur immediately. volume slewing the ic offers volume slewing for all volume changes to further reduce clicks and pops. when enabled, the ic ramps through intermediate volume settings when a change to the volume is made. if zero-crossing detection is disabled, slewing occurs at a rate of 0.2ms per step. if zero-crossing detection is enabled, slew time depends on the input signal. if the duration between zero-cross - ings is less than 0.2ms, the slew time is limited at 0.2ms per volume change. if the duration between zero-cross - ings is longer than 0.2ms, volume changes occur at each zero-crossing. volume slewing also provides a soft-start at power-on and soft-stop at power-off. enhanced volume smoothing enhanced volume smoothing can be used when the vol - ume slewing feature is enabled. when enhanced volume smoothing is enabled and a volume change occurs, the ic waits for each step in the ramp to be applied before executing the next step. when zero-crossing detection is enabled, enhanced volume smoothing prevents large steps in the output volume when no zero-crossings are detected. volume readback the ic features three volume readback registers that report the actual volume settings of the speaker, left headphone, and right headphone volume registers. the drc, expander, and distortion limiter are capable of automatically adjusting these volume registers according to their respective settings. i 2 c slave address the ics audio subsystem uses a slave address of 0x9a or 1001101 r/ w . the address is defined as the 7 most significant bits (msbs) followed by the read/write bit. set the read/write bit to 1 to configure the audio subsystem to read mode. set the read/write bit to 0 to configure the ic to write mode. the address is the first byte of information sent to the ic after the start condition. registers map 19 internal registers program the audio subsystem. table 1 lists all of the registers, their addresses, and power-on-reset states. register 0xff indicates the device revision. write zeros to all unused bits in the register table when updating the register, unless other - wise noted. figure 14. class h operation 32ms 1.8v 0.9v v th v th -0.9v -1.8v hpvdd hpvss output voltage 32ms ???????????????????????????????????????????????????????????????? maxim integrated products 29 MAX97003 high-efficiency, low-noise audio subsystem table 1. register map register b7 b6 b5 b4 b3 b2 b1 b0 address default r/w status left headphone volume readback 0 0 hplvolrb 0x00 r right headphone volume readback 0 0 hprvolrb 0x01 r speaker volume readback 0 0 spkvolrb 0x02 r input a configuration 0 0 0 inadiff pgaina 0x03 0x00 r/w input b configuration 0 0 0 inbdiff pgainb 0x04 0x00 r/w headphone mixer hplmix hprmix 0x05 0x00 r/w speaker mixer 0 0 0 0 spkmix 0x06 0x00 r/w left headphone volume hplm 0 hplvol 0x07 0x00 r/w right headphone volume hprm 0 hprvol 0x08 0x00 r/w speaker volume spkm 0 spkvol 0x09 0x00 r/w dynamic range control drcen drcatk drcrls 0x0a 0x00 r/w dynamic range control 0 0 0 drcth 0x0b 0x00 r/w headphone expander exphen exphatk exphth 0x0c 0x00 r/w speaker expander expsen expsatk expsth 0x0d 0x00 r/w distortion limiter thdclp 0 thdrls 0x0e 0x00 r/w speaker low-power mode slpen 0 slpth 0x0f 0x00 r/w output gain 0 0 0 0 hpgain spkgain 0x10 0x00 r/w advanced configuration vs2en slew zcd 0 ffm 0 cpsel fixed 0x11 0x00 r/w power management shdn 0 0 0 0 spken hplen hpren 0x12 0x00 r/w revision id rev id rev 0xff 0x40 r ???????????????????????????????????????????????????????????????? maxim integrated products 30 MAX97003 high-efficiency, low-noise audio subsystem volume readback the volume readback registers report the actual volume setting of each output volume control when the drc, expand - er, or distortion limiter is active. table 2. volume readback registers register bit name description 0x00/0x01/ 0x02 5 hplvolrb/ hprvolrb/ spkvolrb output volume value gain (db) value gain (db) value gain (db) value gain (db) 0x00 -63 0x10 -47 0x20 -31 0x30 -15 4 0x01 -62 0x11 -46 0x21 -30 0x31 -14 0x02 -61 0x12 -45 0x22 -29 0x32 -13 0x03 -60 0x13 -44 0x23 -28 0x33 -12 3 0x04 -59 0x14 -43 0x24 -27 0x34 -11 0x05 -58 0x15 -42 0x25 -26 0x35 -10 0x06 -57 0x16 -41 0x26 -25 0x36 -9 2 0x07 -56 0x17 -40 0x27 -24 0x37 -8 0x08 -55 0x18 -39 0x28 -23 0x38 -7 0x09 -54 0x19 -38 0x29 -22 0x39 -6 1 0x0a -53 0x1a -37 0x2a -21 0x3a -5 0x0b -52 0x1b -36 0x2b -20 0x3b -4 0x0c -51 0x1c -35 0x2c -19 0x3c -3 0 0x0d -50 0x1d -34 0x2d -18 0x3d -2 0x0e -49 0x1e -33 0x2e -17 0x3e -1 0x0f -48 0x1f -32 0x2f -16 0x3f 0 ???????????????????????????????????????????????????????????????? maxim integrated products 31 MAX97003 high-efficiency, low-noise audio subsystem input configuration the input configuration registers allow the selection of single-ended or differential modes as well as preamp gain set - tings for ina and inb. table 3. input configuration registers register bit name description 0x03/0x04 4 inadiff/ inbdiff input a/b differential mode. configures the input as either a mono differential signal (in_ = in_2 - in_1) or as a stereo signal (in_1 = left, in_2 = right). 0 = stereo single-ended 1 = differential 3 pgaina/ pgainb input a/b preamp gain. set the input gain to maximize output signal level for a given input signal range to improve the snr of the system. value level (db) value level (db) 2 0x0 -3 0x6 +6 0x1 -1.5 0x7 +7.5 1 0x2 -0 0x8 +9 0x3 +1.5 0x9 +10.5 0 0x4 +3 0xaC0xf +12 0x5 +4.5 ???????????????????????????????????????????????????????????????? maxim integrated products 32 MAX97003 high-efficiency, low-noise audio subsystem table 4. mixer registers mixers the ic features independent mixers for the left headphone, right headphone, and speaker paths. each output can select any combination of any inputs. this allows for mixing two audio signals together and routing independent signals to the headphone and speaker amplifiers. if one of the inputs is not selected by either mixer, it is automatically powered down to reduce current consumption. register bit name description 0x05 7 hplmix left headphone mixer. selects which of the four inputs is routed to the left headphone output. 6 0000 xxx1 xx1x x1xx 1xxx no input ina1 (disabled when inadiff = 1) ina2 (select when inadiff = 1) inb1 (disabled when inbdiff = 1) inb2 (select when inbdiff = 1) 5 4 3 hprmix right headphone mixer. selects which of the four inputs is routed to the right headphone output. 2 0000 xxx1 xx1x x1xx 1xxx no input ina1 (disabled when inadiff = 1) ina2 (select when inadiff = 1) inb1 (disabled when inbdiff = 1) inb2 (select when inbdiff = 1) 1 0 0x06 3 spkmix speaker mixer. selects which of the four inputs is routed to the speaker output. 2 0000 xxx1 xx1x x1xx 1xxx no input ina1 (disabled when inadiff = 1) ina2 (select when inadiff = 1) inb1 (disabled when inbdiff = 1) inb2 (select when inbdiff = 1) 1 0 ???????????????????????????????????????????????????????????????? maxim integrated products 33 MAX97003 high-efficiency, low-noise audio subsystem volume control the speaker, left headphone, and right headphone have independent volume control registers that allow a gain to be selected from -63db to 0db. table 5. headphone volume control registers register bit name description 0x07/0x08/ 0x09 7 hplm/ hprm/ spkm output mute 0 = unmuted 1 = muted 5 hplvol/ hprvol/ spkvol output volume value gain (db) value gain (db) value gain (db) value gain (db) 0x00 -63 0x10 -47 0x20 -31 0x30 -15 4 0x01 -62 0x11 -46 0x21 -30 0x31 -14 0x02 -61 0x12 -45 0x22 -29 0x32 -13 0x03 -60 0x13 -44 0x23 -28 0x33 -12 3 0x04 -59 0x14 -43 0x24 -27 0x34 -11 0x05 -58 0x15 -42 0x25 -26 0x35 -10 0x06 -57 0x16 -41 0x26 -25 0x36 -9 2 0x07 -56 0x17 -40 0x27 -24 0x37 -8 0x08 -55 0x18 -39 0x28 -23 0x38 -7 0x09 -54 0x19 -38 0x29 -22 0x39 -6 1 0x0a -53 0x1a -37 0x2a -21 0x3a -5 0x0b -52 0x1b -36 0x2b -20 0x3b -4 0x0c -51 0x1c -35 0x2c -19 0x3c -3 0 0x0d -50 0x1d -34 0x2d -18 0x3d -2 0x0e -49 0x1e -33 0x2e -17 0x3e -1 0x0f -48 0x1f -32 0x2f -16 0x3f 0 ???????????????????????????????????????????????????????????????? maxim integrated products 34 MAX97003 high-efficiency, low-noise audio subsystem table 6. dynamic range control registers dynamic range control the drc attenuates high-level signals without affecting low-level signals. attenuation is achieved by automatically modifying the speaker volume as appropriate. when the drc is enabled, the overall volume can be increased without clipping the high-level signals. to operate the drc, select a compression threshold, compression ratio, attack time constant, and release time. register bit name description 0x0a 7 drcen drc enable and compression ratio 000 = 1:1 (disabled) 001 = 1.34:1 010 = 2:1 011 = 4:1 100 C 111 = j :1 6 5 4 drcatk drc attack time constant. defines the time constant used during attack. 00 = 500 f s 01 = 1ms 10 = 10ms 11 = 50ms 3 2 drcrls drc release time. defines the release rate per step. 000 = 800ms 001 = 400ms 010 = 150ms 011 = 75ms 100 = 50ms 101C111 = 25ms 1 0 0x0b 4 drcth compression threshold level. specifies the minimum input signal level for which compression is applied. value level (v rms ) value level (v rms ) 3 0x00 reserved 0x10 0.354 0x01 0.839 0x11 0.334 0x02 0.792 0x12 0.315 0x03 0.748 0x13 0.298 2 0x04 0.706 0x14 0.281 0x05 0.667 0x15 0.265 0x06 0.629 0x16 0.251 0x07 0.594 0x17 0.237 1 0x08 0.561 0x18 0.223 0x09 0.529 0x19 0.211 0x0a 0.500 0x1aC0x1f 0.199 0 0x0b 0.472 0x0c 0.445 0x0d 0.421 0x0e 0.397 0x0f 0.375 ???????????????????????????????????????????????????????????????? maxim integrated products 35 MAX97003 high-efficiency, low-noise audio subsystem expander (noise gate) the expander/noise gate eliminates noise when no desired signal is present by attenuating peak signals that are below the selected threshold. attenuation is achieved by automatically modifying the headphone or speaker volume as appro - priate. to operate the headphone or speaker expander, select an expansion threshold, expansion ratio, and attack time in the appropriate headphone or speaker expander registers. table 7. expander registers register bit name description 0x0c/0x0d 7 exphen/ expsen headphone/speaker expansion ratio 00 = 1:1 (disabled) 01 = 2:1 10 = 4:1 11 = j :1 (noise gate) 6 5 exphatk/ expsatk headphone/speaker expander attack time. decreases volume after the signal drops below the selected expander threshold. 4 value attack time (ms/step) 000 001 010 011 100 101 110C111 500 350 250 100 50 25 15 3 2 exphth/ expsth headphone/speaker noise gate threshold. the expander attenuates or mutes the output below this threshold. thresholds are based on the pga input signal level. value threshold (mv p ) 1 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 reserved 32 20 10 8 4 2 1 0 ???????????????????????????????????????????????????????????????? maxim integrated products 36 MAX97003 high-efficiency, low-noise audio subsystem table 8. distortion limiter register distortion limiter the distortion limiter monitors the audio signal at the output of the class d speaker amplifier and decreases the gain if the distortion exceeds the selected threshold. attenuation is achieved by automatically modifying the speaker volume as appropriate. to operate the distortion limiter, select a distortion limit (% thd+n) and a release time constant. register bit name description 0x0e 7 thdclp distortion limit. measured in % thd+n. zcd must be set to 0 for the distortion limiter to function. 6 value distortion limit (%) value distortion limit (%) 0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 limiter disabled < 1 1 2 4 6 8 10 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 12 14 16 18 20 21 22 24 5 4 2 thdrls limiter release time constant. time constant used while increasing the gain after distortion is no longer detected at the output. 000 = 6.2s 001 = 3.1s 010 = 1.6s 011 = 815ms 100 = 419ms 101 = 223ms 110 = 116ms 111 = 76ms 1 0 ???????????????????????????????????????????????????????????????? maxim integrated products 37 MAX97003 high-efficiency, low-noise audio subsystem speaker low-power mode the speaker expander includes a low-power mode that increases power efficiency when a desired audio signal is not present. when this feature is enabled, the class d switching output is active only if the speaker volume setting selected by the expander is above the selected low-power mode threshold. low-power mode is only available when the speaker expander is enabled. table 9. speaker low-power mode register register bit name description 0x0f 7 slpen speaker low-power mode. only functions if expsen 0. 0 = class d output is active continuously. 1 = class d output is active if the speaker volume setting selected by the expander is above slpth. 5 slpth speaker low-power mode volume threshold. threshold used to determine if speaker amplifier should be enabled or disabled. if the volume selected by the expander is less than this threshold, the speaker amplifier is disabled. 4 value gain (db) value gain (db) value gain (db) value gain (db) 0x00 -63 0x10 -47 0x20 -31 0x30 -15 3 0x01 -62 0x11 -46 0x21 -30 0x31 -14 0x02 -61 0x12 -45 0x22 -29 0x32 -13 0x03 -60 0x13 -44 0x23 -28 0x33 -12 2 0x04 -59 0x14 -43 0x24 -27 0x34 -11 0x05 -58 0x15 -42 0x25 -26 0x35 -10 0x06 -57 0x16 -41 0x26 -25 0x36 -9 0x07 -56 0x17 -40 0x27 -24 0x37 -8 1 0x08 -55 0x18 -39 0x28 -23 0x38 -7 0x09 -54 0x19 -38 0x29 -22 0x39 -6 0x0a -53 0x1a -37 0x2a -21 0x3a -5 0x0b -52 0x1b -36 0x2b -20 0x3b -4 0 0x0c -51 0x1c -35 0x2c -19 0x3c -3 0x0d -50 0x1d -34 0x2d -18 0x3d -2 0x0e -49 0x1e -33 0x2e -17 0x3e -1 0x0f -48 0x1f -32 0x2f -16 0x3f 0 ???????????????????????????????????????????????????????????????? maxim integrated products 38 MAX97003 high-efficiency, low-noise audio subsystem table 10. output gain register output gain the output stage of the headphone and speaker amplifiers can be configured to provide additional gain. the head - phone amplifier allows a range of 0db to +6db. the speaker amplifier allows range of +12db to +24db. register bit name description 0x10 3 hpgain headphone output gain 00 = 0db 01 = +2db 10 = +4db 11 = +6db 2 1 spkgain speaker output gain 00 = +12db 01 = +16db 10 = +20db 11 = +24db 0 ???????????????????????????????????????????????????????????????? maxim integrated products 39 MAX97003 high-efficiency, low-noise audio subsystem table 11. advanced configuration register advanced configuration the ic includes several advanced configurations related to automatic volume changes initiated by the drc, expander, and distortion limiter. in addition, settings for the class d speaker modulation scheme and headphone charge pump are configured in register 0x11. register bit name description 0x11 7 vs2en enhanced volume smoothing. during volume slewing, the controller waits for each step in the ramp to be applied before executing the next step. when zero-crossing detection is enabled, this prevents large steps in the output volume when no zero-crossings are detected. 0 = disabled 1 = enabled 6 slew volume slewing. determines whether volume slewing is used on all volume control changes to reduce clicks and pops. when enabled, volume changes cause the ic to ramp through intermediate volume settings whenever a change to the volume is made. if zcd = 1, slewing occurs at a rate of 0.2ms per step. if zcd = 0, slew time depends on the input signal frequency. this bit also activates soft-start at power-on and soft-stop at power-off. 0 = enabled 1 = disabled 5 zcd zero-crossing detection. determines whether zero-crossing detection is used on all volume control changes to reduce clicks and pops. disabling zero-crossing detection allows volume changes to occur immediately. zero-crossing detection times out at 100ms. 0 = enabled 1 = disabled 3 ffm fixed class d frequency enable 0 = spread-spectrum modulation 1 = fixed-frequency modulation 1 cpsel charge-pump output select. works with fixed to set q v dd or q v dd /2 outputs on cpvdd and cpvss. ignored when fixed = 0. 0 = q v dd on cpvdd/cpvss 1 = q v dd /2 on cpvdd/cpvss 0 fixed class h mode. when enabled, this bit forces the charge pump to generate static power rails for cpvdd and cpvss, instead of dynamically adjusting them based on output signal level. 0 = class h mode 1 = fixed supply mode ???????????????????????????????????????????????????????????????? maxim integrated products 40 MAX97003 high-efficiency, low-noise audio subsystem table 12. power management register power management the power management register allows the speaker, left headphone, and right headphone signal paths to be enabled. it also enables the ic device. i 2 c serial interface the ic features an i 2 c/smbus-compatible, two-wire seri - al interface consisting of a serial-data line (sda) and a serial-clock line (scl). sda and scl facilitate communi - cation between the ic and the master at clock rates up to 400khz. figure 1 shows the two-wire interface timing dia - gram. the master generates scl and initiates data trans - fer on the bus. the master device writes data to the ic by transmitting the proper slave address followed by the register address and then the data word. each transmit sequence is framed by a start (s) or repeated start (sr) condition and a stop (p) condition. each word transmitted to the ic is 8 bits long and is followed by an acknowledge clock pulse. a master reading data from the ic transmits the proper slave address followed by a series of nine scl pulses. the ic transmits data on sda in sync with the master-generated scl pulses. the master acknowledges receipt of each byte of data. each read sequence is framed by a start (s) or repeated start (sr) condition, a not acknowledge, and a stop figure 15. i 2 c serial interface timing diagram register bit name description 0x12 7 shdn software shutdown 0 = device disabled 1 = device enabled 2 spken speaker amplifier enable 0 = disabled 1 = enabled 1 hplen left headphone amplifier enable 0 = disabled 1 = enabled 0 hpren right headphone amplifier enable 0 = disabled 1 = enabled scl sda t r t f t buf start condition stop condition repeated start condition start condition t su,sto t hd,sta t su,sta t hd,dat t su,dat t low t high t hd,sta t sp ???????????????????????????????????????????????????????????????? maxim integrated products 41 MAX97003 high-efficiency, low-noise audio subsystem (p) condition. sda operates as both an input and an open-drain output. a pullup resistor, typically greater than 500 i , is required on sda. scl operates only as an input. a pullup resistor, typically greater than 500 i , is required on scl if there are multiple masters on the bus, or if the single master has an open-drain scl output. series resistors in line with sda and scl are optional. series resistors protect the digital inputs of the ic from high voltage spikes on the bus lines, and minimize cross - talk and undershoot of the bus signals. bit transfer one data bit is transferred during each scl cycle. the data on sda must remain stable during the high period of the scl pulse. changes in sda while scl is high are control signals. see the start and stop conditions section. start and stop conditions sda and scl idle high when the bus is not in use. a mas - ter initiates communication by issuing a start condition. a start condition is a high-to-low transition on sda with scl high. a stop condition is a low-to-high transition on sda while scl is high ( figure 16 ). a start condition from the master signals the beginning of a transmission to the ic. the master terminates transmission, and frees the bus, by issuing a stop condition. the bus remains active if a repeated start condition is generated instead of a stop condition. early stop conditions the ic recognizes a stop condition at any point during data transmission except if the stop condition occurs in the same high pulse as a start condition. for proper operation, do not send a stop condition during the same scl high pulse as the start condition. slave address the slave address is defined as the seven most signifi - cant bits (msbs) followed by the read/write bit. for the ic, the seven most significant bits are 1001101. setting the read/write bit to 1 (slave address = 0x9b) configures the ic for read mode. setting the read/write bit to 0 (slave address = 0x9a) configures the ic for write mode. the address is the first byte of information sent to the ic after the start condition. acknowledge the acknowledge bit (ack) is a clocked ninth bit that the ic uses to handshake receipt each byte of data when in write mode ( figure 17 ). the ic pulls down sda dur - ing the entire master-generated ninth clock pulse if the previous byte is successfully received. monitoring ack allows for detection of unsuccessful data transfers. an unsuccessful data transfer occurs if a receiving device is busy or if a system fault has occurred. in the event of an unsuccessful data transfer, the bus master retries com - munication. the master pulls down sda during the ninth clock cycle to acknowledge receipt of data when the ic is in read mode. an acknowledge is sent by the master after each read byte to allow data transfer to continue. a not-acknowledge is sent when the master reads the final byte of data from the ic, followed by a stop condition. figure 16. start, stop, and repeated start conditions figure 17. acknowledge scl sda ss rp 1 scl start condition sda 28 9 clock pulse for acknowledgment acknowledge not acknowledge ???????????????????????????????????????????????????????????????? maxim integrated products 42 MAX97003 high-efficiency, low-noise audio subsystem figure 18. writing 1 byte of data to the ic figure 19. writing n-bytes of data to the ic write data format a write to the ic includes transmission of a start con - dition, the slave address with the r/ w bit set to 0, one byte of data to configure the internal register address pointer, one or more bytes of data, and a stop condi - tion. figure 18 illustrates the proper frame format for writing one byte of data to the ic. figure 19 illustrates the frame format for writing n-bytes of data to the ic. the slave address with the r/ w bit set to 0 indicates that the master intends to write data to the ic. the ic acknowledges receipt of the address byte during the master-generated ninth scl pulse. the second byte transmitted from the master configures the ics internal register address pointer. the pointer tells the ic where to write the next byte of data. an acknowl - edge pulse is sent by the ic upon receipt of the address pointer data. the third byte sent to the ic contains the data that are written to the chosen register. an acknowledge pulse from the ic signals receipt of the data byte. the address pointer autoincrements to the next register address after each received data byte. this autoincrement feature allows a master to write to sequential registers within one continuous frame. the master signals the end of trans - mission by issuing a stop condition. register addresses greater than 0x12 are reserved. do not write to these addresses. a 0 slave address register address data byte acknowledge from slave r/w 1 byte autoincrement internal register address pointer acknowledge from slave acknowledge from slave b1 b0 b3 b2 b5 b4 b7 b6 s a a p 1 byte autoincrement internal register address pointer acknowledge from slave acknowledge from slave b1 b0 b3 b2 b5 b4 b7 b6 a a 0 acknowledge from slave r/w s a 1 byte acknowledge from slave b1 b0 b3 b2 b5 b4 b7 b6 p a slave address register address data byte 1 data byte n ???????????????????????????????????????????????????????????????? maxim integrated products 43 MAX97003 high-efficiency, low-noise audio subsystem read data format send the slave address with the r/ w bit set to 1 to initi - ate a read operation. the ic acknowledges receipt of its slave address by pulling sda low during the ninth scl clock pulse. a start command followed by a read com - mand resets the address pointer to register 0x00. the first byte transmitted from the ic is the contents of register 0x00. transmitted data is valid on the rising edge of scl. the address pointer autoincrements after each read data byte. this autoincrement feature allows all registers to be read sequentially within one continuous frame. a stop condition can be issued after any number of read data bytes. if a stop condition is issued followed by another read operation, the first data byte to be read are from register 0x00. the address pointer can be preset to a specific register before a read command is issued. the master pre - sets the address pointer by first sending the ics slave address with the r/ w bit set to 0 followed by the register address. a repeated start condition is then sent fol - lowed by the slave address with the r/ w bit set to 1. the ic then transmits the contents of the specified register. the address pointer autoincrements after transmitting the first byte. the master acknowledges receipt of each read byte during the acknowledge clock pulse. the master must acknowledge all correctly received bytes except the last byte. the final byte must be followed by a not acknowledge from the master and then a stop condi - tion. figure 20 illustrates the frame format for reading one byte from the ic. figure 21 illustrates the frame format for reading multiple bytes from the ic. figure 20. reading one byte of data from the ic figure 21. reading n-bytes of data from the ic acknowledge from salve 1 byte autoincrement internal register address pointer acknowledge from slave a a a a 0 acknowledge from slave r/w s r/w repeated start sr 1 slave address register address slave address data byte acknowledge from slave 1 byte autoincrement internal register address pointer acknowledge from slave not acknowledge from master a a p a a 0 acknowledge from slave r/w s r/w repeated start sr 1 slave address register address slave address data byte ???????????????????????????????????????????????????????????????? maxim integrated products 44 MAX97003 high-efficiency, low-noise audio subsystem applications information filterless class d operation traditional class d amplifiers require an output filter to recover the audio signal from the amplifiers output. the filters add cost, increase the solution size of the amplifier, and can decrease efficiency and thd+n performance. the traditional pwm scheme uses large differential output swings (2 x v pvdd peak-to-peak) and causes large ripple currents. any parasitic resistance in the filter components results in a loss of power, lowering the efficiency. the ic does not require an output filter. the device relies on the inherent inductance of the speaker coil and the natural filtering of both the speaker and the human ear to recover the audio component of the square-wave out - put. eliminating the output filter results in a smaller, less costly, more efficient solution. because the frequency of the ic output is well beyond the bandwidth of most speakers, voice coil movement due to the square-wave frequency is very small. although this movement is small, a speaker not designed to handle the additional power can be damaged. for optimum results, use a speaker with a series inductance > 10 f h. typical 8 i speakers exhibit series inductances in the 20 f h to 100 f h range. rf susceptibility gsm radios transmit using time-division multiple access (tdma) with 217hz intervals. the result is an rf signal with strong amplitude modulation at 217hz and its har - monics that is easily demodulated by audio amplifiers. the ic is designed specifically to reject rf signals. pcb layout, however, has a large impact on the susceptibility of the end product. in rf applications, improvements to both layout and component selection decreases the ics susceptibility to rf noise and prevent rf signals from being demodulated into audible noise. trace lengths should be kept below 1/4 of the wavelength of the rf frequency of interest. minimizing the trace lengths prevents them from function - ing as antennas and coupling rf signals into the ic. the wavelength ( l ) in meters is given by: l = c/f where c = 3 x 10 8 m/s, and f = the rf frequency of interest. route audio signals on middle layers of the pcb to allow ground planes above and below to shield them from rf interference. ideally, the top and bottom layers of the pcb should primarily be ground planes to create effec - tive shielding. additional rf immunity can also be obtained by rely - ing on the self-resonant frequency of capacitors as it exhibits the frequency response similar to a notch filter. depending on the manufacturer, 10pf to 20pf capaci - tors typically exhibit self resonance at rf frequencies. these capacitors when placed at the input pins can effectively shunt the rf noise at the inputs of the ic. for these capacitors to be effective, they must have a low- impedance, low-inductance path to the ground plane. avoid using microvias to connect to the ground plane whenever possible as these vias do not conduct well at rf frequencies. startup/shutdown sequencing to ensure proper device initialization and minimal click- and-pop, program the ics control registers in the correct order. table 13 lists the correct startup sequence for the device. to shutdown the ic, simply set shdn = 0. table 13. startup sequence sequence description registers 1 ensure shdn = 0 0x12 2 configure inputs 0x03, 0x04 3 configure mixers 0x05, 0x06 4 configure volume 0x07, 0x08, 0x09 5 configure output gain 0x10 6 enable amplifiers 0x12 7 configure expander and drc 0x0aC0x0f 10 set shdn = 1 0x12 ???????????????????????????????????????????????????????????????? maxim integrated products 45 MAX97003 high-efficiency, low-noise audio subsystem component selection optional ferrite bead filter for applications in which speaker leads exceed 20mm, additional emi suppression can be achieved by using a filter constructed from a ferrite bead and a capacitor to ground ( figure 22 ). use a ferrite bead with low dc resis - tance, high frequency (> 600mhz) impedance between 100 i and 600 i , and rated for at least 1a. the capacitor value varies based on the ferrite bead chosen and the actual speaker lead length. select a capacitor less than 1nf based on emi performance. input capacitor an input capacitor, c in , in conjunction with the input impedance of the ic line inputs forms a highpass filter that removes the dc bias from an incoming analog signal. the ac-coupling capacitor allows the amplifier to automatically bias the signal to an optimum dc level. assuming zero source impedance, the -3db point of the highpass filter is given by: -3db in in 1 f 2r c = r in is defined in the electrical characteristics table under the input resistance section. choose c in so that f -3db is well below the lowest frequency of interest. for best audio quality, use capacitors whose dielectrics have low-voltage coefficients, such as tantalum or aluminum electrolytic. capacitors with high-voltage coefficients, such as ceramics, can result in increased distortion at low frequencies. charge-pump capacitor selection use capacitors with an esr less than 100m i for optimum performance. low-esr ceramic capacitors minimize the output resistance of the charge pump. most surface- mount ceramic capacitors satisfy the esr requirement. for best performance over the extended temperature range, select capacitors with an x7r dielectric. charge-pump flying capacitor the value of the flying capacitor (connected between c1n and c1p) affects the output resistance of the charge pump. a value that is too small degrades the devices ability to provide sufficient current drive, which leads to a loss of output voltage. increasing the value of the flying capacitor reduces the charge-pump output resistance to an extent. above 1 f f, the on-resistance of the internal switches and the esr of external charge-pump capaci - tors dominate. charge-pump holding capacitor the holding capacitor (bypassing cpvss) value and esr directly affect the ripple at cpvss. increasing the capac - itors value reduces output ripple. likewise, decreasing the esr reduces both ripple and output resistance. lower capacitance values can be used in systems with low maximum output power levels. see the output power vs. load resistance graph in the typical operating characteristics section for more information. supply bypassing, layout, and grounding proper layout and grounding are essential for optimum performance. use a large continuous ground plane on a dedicated layer of the pcb to minimize loop areas. connect gnd and pgnd directly to the ground plane using the shortest trace length possible. proper ground - ing improves audio performance, minimizes crosstalk between channels, and prevents digital noise from cou - pling into the analog signals. place the capacitor between c1p and c1n as close as possible to the ic to minimize trace length from c1p to c1n. inductance and resistance added to c1p and c1n reduce the output power of the headphone ampli - fier. bypass cpvdd and cpvss with capacitors located close to the pins with a short trace length to pgnd. close decoupling of cpvdd and cpvss minimizes supply ripple and maximizes output power from the headphone amplifier. bypass pvdd to pgnd with as little trace length as pos - sible. connect spkp and spkn to the speaker using the shortest and widest traces possible. reducing trace length minimizes radiated emi. route spkp/spkn as a differential pair on the pcb to minimize the loop area and thereby the inductance of the circuit. if filter compo - nents are used on the speaker outputs, be sure to locate them as close as possible to the ic to ensure maximum effectiveness. minimize the trace length from any ground tied passive components to pgnd to further minimize radiated emi. figure 22. optional class d ferrite bead filter max97000 class d spkp spkn ???????????????????????????????????????????????????????????????? maxim integrated products 46 MAX97003 high-efficiency, low-noise audio subsystem an evaluation kit (ev kit) is available to provide an exam - ple layout for the ic. the ev kit allows quick setup of the ic and includes easy-to-use software allowing all internal registers to be controlled. wlp applications information for the latest application details on wlp construction, dimensions, tape carrier information, pcb techniques, bump-pad layout, and recommended reflow temperature profile, as well as the latest information on reliability test - ing results, refer to the application note 1891: wafer- level packaging (wlp) and its applications on maxims website. figure 23 shows the dimensions of the wlp balls used on the ic. figure 23. wlp ball dimensions ordering information + denotes a lead(pb)-free/rohs-compliant package. part temp range pin-package MAX97003ewp+ -40 n c to +85 n c 20 wlp 0.21mm 0.24mm ???????????????????????????????????????????????????????????????? maxim integrated products 47 MAX97003 high-efficiency, low-noise audio subsystem package information for the latest package outline information and land patterns (footprints), go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. package type package code outline no. land pattern no. 20 wlp w201a2+1 21-0544 refer to application note 189 1 e d aaaa pin 1 indicator marking a3 a2 a1 a see note 7 0.05 s s e d1 e1 sd b se b a side view -drawing not to scale- 1 a top view bottom view a 1 21-0544 b 0.64 0.19 0.45 0.025 0.27 1.20 1.60 0.40 w201a2+1 2.33 2.36 1.92 1.95 w201b2+1 2.16 2.19 1.63 1.60 5 3 4 2 d b c w201c2+1 2.01 2.04 1.61 1.64 2.08 1.74 1.71 2.11 w201d2+1 0.05 m s ab title document control no. rev. 1 1 approval package outline 20 bumps, wlp pkg. 0.4mm pitch common dimensions a a2 a1 a3 b e1 d1 e sd se 0.05 0.03 0.03 basic basic 0.20 basic 0.00 basic basic ref basic min max max min e d pkg. code depopulated bumps none notes: 1. terminal pitch is defined by terminal center to center value. 2. outer dimension is defined by center lines between scribe lines. 3. all dimensions in millimeter. 4. marking shown is for package orientation reference only. 5. tolerance is 0.02 unless specified otherwise. 6. all dimensions apply to pbfree (+) package codes only. 7. front - side finish can be either black or clear. none none none maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. the parametric values (min and max limits) shown in the electrical characteristics table are guaranteed. other parametric values quoted in this data sheet are provided for guidance. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 48 ? 2011 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. MAX97003 high-efficiency, low-noise audio subsystem revision history revision number revision date description pages changed 0 9/11 initial release |
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